| Index Entry | Section |
|
M | | |
| M16C architecture option | 9.19.1 M32C Options |
| M32C architecture option | 9.19.1 M32C Options |
| M32C modifiers | 9.19.2 Symbolic Operand Modifiers |
| M32C options | 9.19.1 M32C Options |
| M32C support | 9.19 M32C Dependent Features |
| M32R architecture options | 9.20.1 M32R Options |
| M32R architecture options | 9.20.1 M32R Options |
| M32R architecture options | 9.20.1 M32R Options |
| M32R directives | 9.20.2 M32R Directives |
| M32R options | 9.20.1 M32R Options |
| M32R support | 9.20 M32R Dependent Features |
| M32R warnings | 9.20.3 M32R Warnings |
| M680x0 addressing modes | 9.21.2 Syntax |
| M680x0 architecture options | 9.21.1 M680x0 Options |
| M680x0 branch improvement | 9.21.6.1 Branch Improvement |
| M680x0 directives | 9.21.5 680x0 Machine Directives |
| M680x0 floating point | 9.21.4 Floating Point |
| M680x0 immediate character | 9.21.6.2 Special Characters |
| M680x0 line comment character | 9.21.6.2 Special Characters |
| M680x0 opcodes | 9.21.6 Opcodes |
| M680x0 options | 9.21.1 M680x0 Options |
| M680x0 pseudo-opcodes | 9.21.6.1 Branch Improvement |
| M680x0 size modifiers | 9.21.2 Syntax |
| M680x0 support | 9.21 M680x0 Dependent Features |
| M680x0 syntax | 9.21.2 Syntax |
| M68HC11 addressing modes | 9.22.2 Syntax |
| M68HC11 and M68HC12 support | 9.22 M68HC11 and M68HC12 Dependent Features |
| M68HC11 assembler directive .far | 9.22.4 Assembler Directives |
| M68HC11 assembler directive .interrupt | 9.22.4 Assembler Directives |
| M68HC11 assembler directive .mode | 9.22.4 Assembler Directives |
| M68HC11 assembler directive .relax | 9.22.4 Assembler Directives |
| M68HC11 assembler directive .xrefb | 9.22.4 Assembler Directives |
| M68HC11 assembler directives | 9.22.4 Assembler Directives |
| M68HC11 branch improvement | 9.22.6.1 Branch Improvement |
| M68HC11 floating point | 9.22.5 Floating Point |
| M68HC11 modifiers | 9.22.3 Symbolic Operand Modifiers |
| M68HC11 opcodes | 9.22.6 Opcodes |
| M68HC11 options | 9.22.1 M68HC11 and M68HC12 Options |
| M68HC11 pseudo-opcodes | 9.22.6.1 Branch Improvement |
| M68HC11 syntax | 9.22.2 Syntax |
| M68HC12 assembler directives | 9.22.4 Assembler Directives |
| machine dependencies | 9. Machine Dependent Features |
| machine directives, ARC | 9.2.4 ARC Machine Directives |
| machine directives, ARM | 9.3.4 ARM Machine Directives |
| machine directives, H8/300 (none) | 9.10.4 H8/300 Machine Directives |
| machine directives, i860 | 9.14.3 i860 Machine Directives |
| machine directives, i960 | 9.15.3 i960 Machine Directives |
| machine directives, MSP 430 | 9.26.4 MSP 430 Machine Directives |
| machine directives, SH | 9.32.4 SH Machine Directives |
| machine directives, SH64 | 9.33.3 SH64 Machine Directives |
| machine directives, SPARC | 9.34.5 Sparc Machine Directives |
| machine directives, TIC54X | 9.35.9 Directives |
| machine directives, V850 | 9.39.4 V850 Machine Directives |
| machine directives, VAX | 9.38.3 Vax Machine Directives |
| machine directives, x86 | 9.13.2 x86 specific Directives |
| machine independent directives | 7. Assembler Directives |
| machine instructions (not covered) | 1.1 Structure of this Manual |
| machine-independent syntax | 3. Syntax |
| macro directive | 7.77 .macro |
| macro directive, TIC54X | 9.35.9 Directives |
| macros | 7.77 .macro |
| macros, count executed | 7.77 .macro |
| Macros, MSP 430 | 9.26.2.1 Macros |
| macros, TIC54X | 9.35.10 Macros |
| make rules | 2.10 Dependency Tracking: `--MD' |
| manual, structure and purpose | 1.1 Structure of this Manual |
| math builtins, TIC54X | 9.35.7 Math Builtins |
| Maximum number of continuation lines | 2.8 Configuring listing output: `--listing' |
| memory references, i386 | 9.13.8 Memory References |
| memory references, x86-64 | 9.13.8 Memory References |
| memory-mapped registers, TIC54X | 9.35.11 Memory-mapped Registers |
| merging text and data sections | 2.12 Join Data and Text Sections: `-R' |
| messages from assembler | 1.7 Error and Warning Messages |
| MicroBlaze architectures | 9.23 MicroBlaze Dependent Features |
| MicroBlaze directives | 9.23.1 Directives |
| MicroBlaze support | 9.23 MicroBlaze Dependent Features |
| minus, permitted arguments | 6.2.4 Infix Operators |
| MIPS architecture options | 9.24.1 Assembler options |
| MIPS big-endian output | 9.24.1 Assembler options |
| MIPS CPU override | 9.24.5 Directives to override the ISA level |
| MIPS debugging directives | 9.24.3 Directives for debugging information |
| MIPS DSP Release 1 instruction generation override | 9.24.9 Directives to control generation of MIPS ASE instructions |
| MIPS DSP Release 2 instruction generation override | 9.24.9 Directives to control generation of MIPS ASE instructions |
| MIPS ECOFF sections | 9.24.2 MIPS ECOFF object code |
| MIPS endianness | 1. Overview |
| MIPS ISA | 1. Overview |
| MIPS ISA override | 9.24.5 Directives to override the ISA level |
| MIPS little-endian output | 9.24.1 Assembler options |
| MIPS MDMX instruction generation override | 9.24.9 Directives to control generation of MIPS ASE instructions |
| MIPS MIPS-3D instruction generation override | 9.24.9 Directives to control generation of MIPS ASE instructions |
| MIPS MT instruction generation override | 9.24.9 Directives to control generation of MIPS ASE instructions |
| MIPS option stack | 9.24.8 Directives to save and restore options |
| MIPS processor | 9.24 MIPS Dependent Features |
| MIT | 9.21.2 Syntax |
| mlib directive, TIC54X | 9.35.9 Directives |
| mlist directive, TIC54X | 9.35.9 Directives |
| MMIX assembler directive BSPEC | 9.25.3.4 Assembler Directives |
| MMIX assembler directive BYTE | 9.25.3.4 Assembler Directives |
| MMIX assembler directive ESPEC | 9.25.3.4 Assembler Directives |
| MMIX assembler directive GREG | 9.25.3.4 Assembler Directives |
| MMIX assembler directive IS | 9.25.3.4 Assembler Directives |
| MMIX assembler directive LOC | 9.25.3.4 Assembler Directives |
| MMIX assembler directive LOCAL | 9.25.3.4 Assembler Directives |
| MMIX assembler directive OCTA | 9.25.3.4 Assembler Directives |
| MMIX assembler directive PREFIX | 9.25.3.4 Assembler Directives |
| MMIX assembler directive TETRA | 9.25.3.4 Assembler Directives |
| MMIX assembler directive WYDE | 9.25.3.4 Assembler Directives |
| MMIX assembler directives | 9.25.3.4 Assembler Directives |
| MMIX line comment characters | 9.25.3.1 Special Characters |
| MMIX options | 9.25.1 Command-line Options |
| MMIX pseudo-op BSPEC | 9.25.3.4 Assembler Directives |
| MMIX pseudo-op BYTE | 9.25.3.4 Assembler Directives |
| MMIX pseudo-op ESPEC | 9.25.3.4 Assembler Directives |
| MMIX pseudo-op GREG | 9.25.3.4 Assembler Directives |
| MMIX pseudo-op IS | 9.25.3.4 Assembler Directives |
| MMIX pseudo-op LOC | 9.25.3.4 Assembler Directives |
| MMIX pseudo-op LOCAL | 9.25.3.4 Assembler Directives |
| MMIX pseudo-op OCTA | 9.25.3.4 Assembler Directives |
| MMIX pseudo-op PREFIX | 9.25.3.4 Assembler Directives |
| MMIX pseudo-op TETRA | 9.25.3.4 Assembler Directives |
| MMIX pseudo-op WYDE | 9.25.3.4 Assembler Directives |
| MMIX pseudo-ops | 9.25.3.4 Assembler Directives |
| MMIX register names | 9.25.3.3 Register names |
| MMIX support | 9.25 MMIX Dependent Features |
| mmixal differences | 9.25.4 Differences to mmixal |
| mmregs directive, TIC54X | 9.35.9 Directives |
| mmsg directive, TIC54X | 9.35.9 Directives |
| MMX, i386 | 9.13.11 Intel's MMX and AMD's 3DNow! SIMD Operations |
| MMX, x86-64 | 9.13.11 Intel's MMX and AMD's 3DNow! SIMD Operations |
| mnemonic compatibility, i386 | 9.13.5 AT&T Mnemonic versus Intel Mnemonic |
| mnemonic suffixes, i386 | 9.13.3 AT&T Syntax versus Intel Syntax |
| mnemonic suffixes, x86-64 | 9.13.3 AT&T Syntax versus Intel Syntax |
| mnemonics for opcodes, VAX | 9.38.4 VAX Opcodes |
| mnemonics, AVR | 9.4.3 Opcodes |
| mnemonics, D10V | 9.8.4 Opcodes |
| mnemonics, D30V | 9.9.4 Opcodes |
| mnemonics, H8/300 | 9.10.5 Opcodes |
| mnemonics, LM32 | 9.18.3 Opcodes |
| mnemonics, SH | 9.32.5 Opcodes |
| mnemonics, SH64 | 9.33.4 Opcodes |
| mnemonics, Z8000 | 9.37.4 Opcodes |
| mnolist directive, TIC54X | 9.35.9 Directives |
| Motorola syntax for the 680x0 | 9.21.3 Motorola Syntax |
| MOVI instructions, relaxation | 9.40.4.3 Other Immediate Field Relaxation |
| MOVW and MOVT relocations, ARM | 9.3.3.1 ARM relocation generation |
| MRI compatibility mode | 2.9 Assemble in MRI Compatibility Mode: `-M' |
| mri directive | 7.78 .mri val |
| MRI mode, temporarily | 7.78 .mri val |
| MSP 430 floating point (IEEE) | 9.26.3 Floating Point |
| MSP 430 identifiers | 9.26.2.2 Special Characters |
| MSP 430 line comment character | 9.26.2.2 Special Characters |
| MSP 430 machine directives | 9.26.4 MSP 430 Machine Directives |
| MSP 430 macros | 9.26.2.1 Macros |
| MSP 430 opcodes | 9.26.5 Opcodes |
| MSP 430 options (none) | 9.26.1 Options |
| MSP 430 profiling capability | 9.26.6 Profiling Capability |
| MSP 430 register names | 9.26.2.3 Register Names |
| MSP 430 support | 9.26 MSP 430 Dependent Features |
| MSP430 Assembler Extensions | 9.26.2.4 Assembler Extensions |
| mul instruction, i386 | 9.13.15 Notes |
| mul instruction, x86-64 | 9.13.15 Notes |
|